Thread: Anandtech News

The last day of IDF is always reserved for the Intel technology research keynote. This keynote has nothing to do with product announcements, or roadmap updates for the next year, it's a look into the future 5 - 10 years from now.
And we're here live blogging it. The Justin Rattner keynote should get underway in about 10 minutes.

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Pretty much all high-end client SSDs have no issues saturating the current 6Gbps SATA interface. We've talked about a move to PCIe based SSDs but these are the connectors that will do it.
On the right you have SATA Express, which will deliver up to 1GB/s on PCIe 2.0 and up to 2GB/s over PCIe 3.0. On the left there's the eventual landing place: the SFF-8639 connector, good for PCIe x4 with speeds of up to 4GB/s (PCIe 3.0).

Most client machines will likely use the new NGFF card form factor, but for huge capacities and performance (e.g. servers in the enterprise) we'll see a move from SATA to SATA Express to the SFF-8639 connector over the next few years. 

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We've seen a bunch of custom SSD form factors with the arrival of Ultrabooks as well as systems like the MacBook Air and Retina MacBook Pro. The need is simple: standard 7mm or 9.5mm SSDs are too big for some of these machines, and you don't actually need all of that volume to build a fast drive. mSATA cards work as a small form factor solution but they are only available in a single size. We need flexibility both on length (to allow for higher capacities) as well as on the interface side to enable higher performance. The NGFF specification gives us just that.

The spec allows for SATA, PCIe x2 or PCIe x4 interfaces. It also includes definitions for five different card lengths. 
The proposed spec includes two connector definitions: Socket 2 and Socket 3. Socket 2 allows for SATA or PCIe x2 interface for SSDs, WWAN or other non-storage devices. Socket 3 is strictly for high-performance storage, offering up to 4GB/s of bandwidth in a tiny little package. 

This is super exciting as far as I'm concerned. We've strayed too far from standardization and upgradability in the pursuit of ultimate mobility. Now all we need is a smaller form factor user replaceable memory standard.
Update: I just got some hands on shots with a few NGFF samples:

mSATA on the left, NGFF on the right

Gallery: NGFF SSD Standard: Hands On

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So we've seen the new iPhone, and had a chance to briefly play with it at the demo room, but as I've learned in the past so many times you only really know a handset after you've taken a look at the FCC test reports or spent a few days with it yourself. On my flights home, I typed up our iPod and EarBud impressions piece, but also poured over those FCC test reports for the iPhone 5, and it became immediately obvious the iPhone 5 doesn't support simultaneous voice and data on CDMA2000 carriers such as Sprint and Verizon in the US. 

The reasons, as always, are somewhat technical but at a high level pretty simple. Suffice it to say that at a high level this is a design decision which makes the phone as small and light as it is (it really is light, almost alarmingly so) and enables it to support a wide number of LTE bands, rather than some major oversight like I've seen it portrayed. Read on for more.

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Rosewill is a familiar name here at AnandTech. It's Neweggs own brand with products like notebook accessories, peripheral equipment, cases and power supplies. They want to "bring quality hardware and affordable prices together". In most cases they really care about the pricing, but today we will review a product which is rather an expensive high-class solution. Not long ago we've already tested their Gold PSUs which belong to this classification as well. The new products go one step further.

The Fortress series from Rosewill has four different versions, all with 80 Plus Platinum and non-modular cables. We focus on the 450W model in this article as this rating is most interesting for the potential buyers. Japanese capacitors and a single 12V output are just two out of many features. Let’s find out if the unit is doing well and able to surpass the Capstone series.

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When Apple announced the iPhone 5, Phil Schiller officially announced what had leaked several days earlier: the phone is powered by Apple's new A6 SoC.
 
As always, Apple didn't announce clock speeds, CPU microarchitecture, memory bandwidth or GPU details. It did however give us an indication of expected CPU performance:
 

 
Prior to the announcement we speculated the iPhone 5's SoC would simply be a higher clocked version of the 32nm A5r2 used in the iPad 2,4. After all, Apple seems to like saving major architecture shifts for the iPad. 
 
However, just prior to the announcement I received some information pointing to a move away from the ARM Cortex A9 used in the A5. Given Apple's reliance on fully licensed ARM cores in the past, the expected performance gains and unpublishable information that started all of this I concluded Apple's A6 SoC likely featured two ARM Cortex A15 cores. 
 
It turns out I was wrong. But pleasantly surprised.
 
The A6 is the first Apple SoC to use its own ARMv7 based processor design. The CPU core(s) aren't based on a vanilla A9 or A15 design from ARM IP, but instead are something of Apple's own creation.
 
Read on for our analysis.

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Quick analysis of the A6 SoC photos from the iPhone 5 launch event tells us all we need to know about the memory interface, speed and bandwidth of the new platform. As always, the A6 features a PoP stack combining the SoC itself and its DRAM. The package-stacked DRAM helps save space, which comes at a premium inside a device as small as a smartphone. PoP stacks are quite common in all modern smartphones.
Apple thankfully didn't obscure the details of its A6 slide at the launch event, which gave us a Samsung part number: K3PE7E700F-XGC2. Through crafty navigation of Samsung's product guide, Brian Klug got us the details. The K3P tells us we're looking at a dual-channel LPDDR2 package with 32-bit channels. The E7E7 gives us the density of each of the two DRAM die (512MB per die, 1GB total). The final two characters in the part number give us the cycle time/data rate, which in this case is 1066MHz.
Plug all of that into our memory bandwidth scaling chart and you get this:

Roughly 33% more peak memory bandwidth than the iPhone 4S, which can definitely help feed the faster GPU and drive the higher resolution display. Many vendors have been shipping LPDDR2-1066 so there's nothing too surprising here. There's understandably less bandwidth than in the 3rd gen iPad of course as the display/GPU requirements aren't nearly as high.
There's more than just memory clocks that will impact memory bandwidth here. It's unclear whether the A6 improves the memory controller Apple deployed in the A5. ARM architectures (especially in the A9 generation) have typically struggled getting good memory bandwidth efficiency. We'll have to see what happens with the A6.

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While working on our Haswell piece, I've been religiously checking the Geekbench and GLBenchmark results browsers to see if anyone ran either benchmark and decided to tap upload. This usually happens before every major smartphone launch, but in the case of the iPhone 5 the details these applications can give us are even more important.
Yesterday we confirmed that Apple is using its own custom designed ARM based CPU cores in its A6 SoC. Apple opted not to design in a vanilla ARM Cortex A9 likely to avoid relying on pure voltage/frequency scaling to improve performance, and chose not to integrate a Cortex A15 likely because of power consumption concerns as well.
There's absolutely no chance of Apple sending us a nice block diagram of the A6 CPU cores, so we have to work with what clues we can get elsewhere. Geekbench is particularly useful because it reports clock speed. Why does clock speed matter? Because, if reported accurately, it can tell us a lot about how the A6's CPU design has improved from an IPC standpoint. Remember that clock speed doesn't matter, but rather the combination of clock frequency and instructions executed per clock that define single threaded performance.

A short while ago, Geekbench results for a device identifying itself as an iPhone5,2 appeared. Brian believes this is likely the A1429 Verizon device (A1428 being iPhone 5,1) - perhaps one presampled to a reviewer looking to test their luck.
MacRumors appears to be first on the scene, having been tipped by an employee at PrimateLabs (the creators of Geekbench). I need to preface the rest of this post with a giant caution sign: I have no inside knowledge of whether or not these results are legitimate. They seem believable, but anything can happen. The rest of this post is simply my initial thoughts on what these mean, should the results be accurate.

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Despite crazy travel schedules and Brian being in South Korea, we managed to carve out nearly 2 hours across time zones to discuss the iPhone 5. Brian goes over his hands on experiences with the device and we touch on everything that has been happening with the A6 SoC discovery. At the end of the episode, we also give a quick overview of Haswell and discuss the significant changes Intel is making to the platform to support it.
The AnandTech Podcast - Episode 5
featuring Anand Shimpi & Brian Klug
iTunes
RSS - mp3, m4a
Direct Links - mp3, m4a
Total Time: 1 hour 59 minutes
As always, comments are welcome and appreciated. Let us know what you liked, hated and want to hear more of.

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Now that the exclusive license Apple had for Thunderbolt has expired, since Computex 2012 we have seen a number of motherboards destined for PCs with a Thunderbolt connector.  Thunderbolt on a motherboard is still an added luxury, adding some $40 to the cost of the board to the user, though that can pale in comparison to the cost of Thunderbolt devices and storage.  Despite all this, Gigabyte’s foray into the Thunderbolt world is spurned in part by the board we are reviewing today – the Gigabyte Z77X-UP4 TH.  Using the Z77 chipset we get a motherboard with two Thunderbolt ports, but it also has the enhanced power delivery brought about by Ultra Durable 5.  Read on for the review and analysis.

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